Image from Amazon.com
Chip design for submicron VLSI : CMOS layout and simulation
Material type:
TextLanguage: English Publication details: Andover : Cengage Learning, 2006.Description: 405pISBN: - 9788131501955
- 621.395Â T06 UYE
| Item type | Current library | Collection | Call number | Status | Barcode | |
|---|---|---|---|---|---|---|
Books
|
Nalanda Library Circulation Books | 621.395 T06 UYE (Browse shelf(Opens below)) | Available | 10242 | ||
|
Books
|
Nalanda Library Circulation Books | 621.395 T06 UYE (Browse shelf(Opens below)) | Available | 10243 | ||
Reference Books
|
Nalanda Library Reference | Reference | 621.395 T06 UYE (Browse shelf(Opens below)) | Available | 10241 |
Total holds: 0
Browsing Nalanda Library shelves, Shelving location: Reference, Collection: Reference Close shelf browser (Hides shelf browser)
| No cover image available | No cover image available | No cover image available |
|
|
|
|
||
| 621.395 T06 ROT Fundamentals of logic design | 621.395 T06 ROT Fundamentals of logic design | 621.395 T06 ROT Fundamentals of logic design | 621.395 T06 UYE Chip design for submicron VLSI : CMOS layout and simulation | 621.395 T06 WES.H CMOS VLSI design : a circuits and systems perspective | 621.395 T06 WES.H CMOS VLSI design : a circuits and systems perspective | 621.395 T07 MAN.C Digital design |
There are no comments on this title.
Log in to your account to post a comment.